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基于MIPS指令集的单周期CPU设计.zip
资源来源:本地上传资源
文件类型:ZIP
大小:114.98KB
评分:
5.0
上传者:yu_2058
更新日期:2024-07-28

（verilog）基于MIPS指令集的单周期CPU设计

资源文件列表(大概)

文件名
大小
rtl/ALU.v
651B
rtl/ALUCtrl.v
752B
rtl/ControlUnit.v
2.57KB
rtl/DataMeM.v
454B
rtl/InstMeM.v
1.52KB
rtl/muxAluSrc.v
203B
rtl/muxMemtoReg.v
270B
rtl/muxPCSrc.v
254B
rtl/muxRegDst.v
259B
rtl/PC.v
347B
rtl/PC_ADD_ADD.v
199B
rtl/PC_Add4.v
132B
rtl/Register_Files.v
710B
rtl/sign_ex.v
177B
rtl/single_cpu_top.v
2.99KB
sim/cpu_tb.v
703B
vivado_project/project_cpu/
-
vivado_project/project_cpu/cpu_tb_behav.wcfg
2.22KB
vivado_project/project_cpu/project_cpu.cache/
-
vivado_project/project_cpu/project_cpu.cache/compile_simlib/
-
vivado_project/project_cpu/project_cpu.cache/compile_simlib/activehdl/
-
vivado_project/project_cpu/project_cpu.cache/compile_simlib/modelsim/
-
vivado_project/project_cpu/project_cpu.cache/compile_simlib/questa/
-
vivado_project/project_cpu/project_cpu.cache/compile_simlib/riviera/
-
vivado_project/project_cpu/project_cpu.cache/compile_simlib/vcs/
-
vivado_project/project_cpu/project_cpu.cache/compile_simlib/xcelium/
-
vivado_project/project_cpu/project_cpu.cache/sim/
-
vivado_project/project_cpu/project_cpu.cache/sim/ssm.db
538B
vivado_project/project_cpu/project_cpu.cache/wt/
-
vivado_project/project_cpu/project_cpu.cache/wt/project.wpc
61B
vivado_project/project_cpu/project_cpu.cache/wt/synthesis.wdf
6.15KB
vivado_project/project_cpu/project_cpu.cache/wt/xsim.wdf
239B
vivado_project/project_cpu/project_cpu.hw/
-
vivado_project/project_cpu/project_cpu.hw/project_cpu.lpr
290B
vivado_project/project_cpu/project_cpu.ip_user_files/
-
vivado_project/project_cpu/project_cpu.ip_user_files/README.txt
130B
vivado_project/project_cpu/project_cpu.sim/
-
vivado_project/project_cpu/project_cpu.sim/sim_1/
-
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/
-
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/
-
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/compile.bat
876B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/cpu_tb.tcl
460B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/cpu_tb_behav.wdb
30.51KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/cpu_tb_vlog.prj
790B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/elaborate.bat
1.06KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/elaborate.log
6.37KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/glbl.v
1.72KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/simulate.bat
916B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/simulate.log
25B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xelab.pb
10.72KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/
-
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/
-
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/Compile_Options.txt
206B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/obj/
-
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/obj/xsim_0.win64.obj
34.27KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/obj/xsim_1.c
9.72KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/obj/xsim_1.win64.obj
6.01KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/TempBreakPointFile.txt
29B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsim.dbg
25.23KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsim.mem
5.96KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsim.reloc
3.7KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsim.rlx
723B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsim.rtti
323B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsim.svtype
93B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsim.type
24B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsim.xdbg
52.62KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsimcrash.log
-
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsimk.exe
88.03KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsimkernel.log
317B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_behav/xsimSettings.ini
1.4KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/
-
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@a@l@u.sdb
1.58KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@a@l@u@ctrl.sdb
1.4KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@control@unit.sdb
3.8KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@data@me@m.sdb
1.61KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@inst@me@m.sdb
3.5KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@p@c.sdb
910B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@p@c_@a@d@d_@a@d@d.sdb
656B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@p@c_@add4.sdb
553B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/@register_@files.sdb
2.08KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/cpu_tb.sdb
1.83KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb
4.42KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/mux@alu@src.sdb
718B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/mux@memto@reg.sdb
722B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/mux@p@c@src.sdb
714B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/mux@reg@dst.sdb
720B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/sign_ex.sdb
647B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/single_cpu_top.sdb
6.43KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
2.22KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xsim.ini
40B
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xvlog.log
2.62KB
vivado_project/project_cpu/project_cpu.sim/sim_1/behav/xsim/xvlog.pb
4.85KB
vivado_project/project_cpu/project_cpu.xpr
14.78KB

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